diff --git a/Software/hoverboard-firmware-hack_modified20190825/Src/stm32f1xx_it.c b/Software/hoverboard-firmware-hack_modified20190825/Src/stm32f1xx_it.c new file mode 100644 index 0000000000000000000000000000000000000000..8ca24ee5d5d8580294512fcf727693368af5513c --- /dev/null +++ b/Software/hoverboard-firmware-hack_modified20190825/Src/stm32f1xx_it.c @@ -0,0 +1,267 @@ +/** + ****************************************************************************** + * @file stm32f1xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * + * COPYRIGHT(c) 2017 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* Includes ------------------------------------------------------------------*/ +#include "stm32f1xx_hal.h" +#include "stm32f1xx.h" +#include "stm32f1xx_it.h" +#include "config.h" + +extern DMA_HandleTypeDef hdma_i2c2_rx; +extern DMA_HandleTypeDef hdma_i2c2_tx; +extern I2C_HandleTypeDef hi2c2; + +extern DMA_HandleTypeDef hdma_usart2_rx; +extern DMA_HandleTypeDef hdma_usart2_tx; + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + + +/******************************************************************************/ +/* Cortex-M3 Processor Interruption and Exception Handlers */ +/******************************************************************************/ + +/** +* @brief This function handles Non maskable interrupt. +*/ +void NMI_Handler(void) { + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** +* @brief This function handles Hard fault interrupt. +*/ +void HardFault_Handler(void) { + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while(1) { + } + /* USER CODE BEGIN HardFault_IRQn 1 */ + + /* USER CODE END HardFault_IRQn 1 */ +} + +/** +* @brief This function handles Memory management fault. +*/ +void MemManage_Handler(void) { + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while(1) { + } + /* USER CODE BEGIN MemoryManagement_IRQn 1 */ + + /* USER CODE END MemoryManagement_IRQn 1 */ +} + +/** +* @brief This function handles Prefetch fault, memory access fault. +*/ +void BusFault_Handler(void) { + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while(1) { + } + /* USER CODE BEGIN BusFault_IRQn 1 */ + + /* USER CODE END BusFault_IRQn 1 */ +} + +/** +* @brief This function handles Undefined instruction or illegal state. +*/ +void UsageFault_Handler(void) { + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while(1) { + } + /* USER CODE BEGIN UsageFault_IRQn 1 */ + + /* USER CODE END UsageFault_IRQn 1 */ +} + +/** +* @brief This function handles System service call via SWI instruction. +*/ +void SVC_Handler(void) { + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** +* @brief This function handles Debug monitor. +*/ +void DebugMon_Handler(void) { + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** +* @brief This function handles Pendable request for system service. +*/ +void PendSV_Handler(void) { + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** +* @brief This function handles System tick timer. +*/ +#ifdef CONTROL_PPM +void PPM_SysTick_Callback(void); +#endif +void SysTick_Handler(void) { + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + HAL_SYSTICK_IRQHandler(); + /* USER CODE BEGIN SysTick_IRQn 1 */ +#ifdef CONTROL_PPM + PPM_SysTick_Callback(); +#endif + /* USER CODE END SysTick_IRQn 1 */ +} + +#ifdef CONTROL_NUNCHUCK +extern I2C_HandleTypeDef hi2c2; +void I2C1_EV_IRQHandler(void) +{ + HAL_I2C_EV_IRQHandler(&hi2c2); +} + +void I2C1_ER_IRQHandler(void) +{ + HAL_I2C_ER_IRQHandler(&hi2c2); +} + +/** +* @brief This function handles DMA1 channel4 global interrupt. +*/ +void DMA1_Channel4_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ + + /* USER CODE END DMA1_Channel4_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_i2c2_tx); + /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */ + + /* USER CODE END DMA1_Channel4_IRQn 1 */ +} + +/** +* @brief This function handles DMA1 channel5 global interrupt. +*/ +void DMA1_Channel5_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ + + /* USER CODE END DMA1_Channel5_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_i2c2_rx); + /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */ + + /* USER CODE END DMA1_Channel5_IRQn 1 */ +} +#endif + +#ifdef CONTROL_PPM +void EXTI3_IRQHandler(void) +{ + PPM_ISR_Callback(); + __HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_3); +} +#endif + +#ifdef CONTROL_SERIAL_USART2 +void DMA1_Channel6_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ + + /* USER CODE END DMA1_Channel4_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart2_rx); + /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */ + + /* USER CODE END DMA1_Channel4_IRQn 1 */ +} + +/** +* @brief This function handles DMA1 channel5 global interrupt. +*/ +void DMA1_Channel7_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ + + /* USER CODE END DMA1_Channel5_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart2_tx); + /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */ + + /* USER CODE END DMA1_Channel5_IRQn 1 */ +} +#endif + +/******************************************************************************/ +/* STM32F1xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32f1xx.s). */ +/******************************************************************************/ + + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/